Sachin Tolay

http://www.linkedin.com/in/sachin-tolay-3195b91a/

Joined on Jun 9, 2025 tolaysachin@gmail.com http://www.linkedin.com/in/sachin-tolay-3195b91a/

Work

Splunk

Sachin Tolay

Jul 30

Blocking vs Non-blocking vs Asynchronous I/O

#programming #tutorial #learning #linux

3 min read

Sachin Tolay

Jul 20

Traditional IO vs mmap vs Direct IO: How Disk Access Really Works

#tutorial #learning #programming #architecture

3 min read

Sachin Tolay

Jul 13

Understanding Direct Memory Access (DMA): How Data Moves Efficiently Between Storage and Memory

#tutorial #softwareengineering #architecture #dma

3 min read

Sachin Tolay

Jul 9

How HDDs and SSDs Store Data The Block Storage Model

6 min read

Sachin Tolay

Jul 3

Understanding OAuth 2.0 and OpenID Connect: A Step-by-Step Guide

#identity #oauth #iam

5 min read

Sachin Tolay

Jun 30

Core Attributes of Distributed Systems: Reliability, Availability, Scalability, and More

#distributedsystems #database #scalability #availability

5 min read

Sachin Tolay

Jun 28

Memory Models Explained: How Threads Really See Memory

#memory #programming #performance #multithreading

4 min read

Sachin Tolay

Jun 26

Instruction Reordering: Your Code Doesn’t Always Run in the Order You Wrote It

#programming #tutorial #coding #memory

4 min read

Sachin Tolay

Jun 25

Superscalar vs SIMD vs Multicore: Understanding Modern CPU Parallelism

#cpu #systemdesign #tutorial #superscalar

3 min read

Sachin Tolay

Jun 22

CPU Pipelining: How Modern Processors Execute Instructions Faster

#programming #cpu #tutorial #performance

5 min read

Sachin Tolay

Jun 19

Cache Coherence: How the MESI Protocol Keeps Multi-Core CPUs Consistent

#cpu #programming #memory #learning

8 min read

Sachin Tolay

Jun 19

Understanding CPU Cache Organization and Structure

#memory #ram #performance #tutorial

10 min read

Sachin Tolay

Jun 15

Memory Access Demystified: How Virtual Memory, Caches, and DRAM Impact Performance

#memory #performance #latency #tutorial

8 min read

Sachin Tolay

Jun 9

Understanding DRAM Internals: How Channels, Banks, and DRAM Access Patterns Impact Performance

#memory #ram #performance #tutorial

5 min read

Sachin Tolay

Jun 9

Understanding DRAM Internals: How Channels, Banks, and DRAM Access Patterns Impact Performance

#memory #ram #performance #tutorial

5 min read

DEV Community

Sachin Tolay

Badges

Writing Debut

Blocking vs Non-blocking vs Asynchronous I/O

Traditional IO vs mmap vs Direct IO: How Disk Access Really Works

Understanding Direct Memory Access (DMA): How Data Moves Efficiently Between Storage and Memory

How HDDs and SSDs Store Data The Block Storage Model

Understanding OAuth 2.0 and OpenID Connect: A Step-by-Step Guide

Core Attributes of Distributed Systems: Reliability, Availability, Scalability, and More

Memory Models Explained: How Threads Really See Memory

Instruction Reordering: Your Code Doesn’t Always Run in the Order You Wrote It

Superscalar vs SIMD vs Multicore: Understanding Modern CPU Parallelism

CPU Pipelining: How Modern Processors Execute Instructions Faster

Cache Coherence: How the MESI Protocol Keeps Multi-Core CPUs Consistent

Understanding CPU Cache Organization and Structure

Memory Access Demystified: How Virtual Memory, Caches, and DRAM Impact Performance

Understanding DRAM Internals: How Channels, Banks, and DRAM Access Patterns Impact Performance

Understanding DRAM Internals: How Channels, Banks, and DRAM Access Patterns Impact Performance